1. Field of the Invention
The present invention generally relates to a reset signal generation circuit, and more particularly to a reset signal generation circuit in a battery charger, which circuit detects a voltage drop of a voltage source and generates a reset signal.
2. Description of the Related Art
FIG. 1 shows an example of a conventional reset signal generation circuit. Voltage level shift circuits 11 to 16 are cascaded. Each of the voltage level shift circuits 11 to 16 is made up of a pnp transistor Q1, an npn transistor Q2 and a resistor R1 used as a current limiter. In each of the voltage level shift circuits 11 to 16, all of a base and a collector of the pnp transistor Q1 and a base and a collector of the npn transistor Q2 are connected together. An emitter of the pnp transistor Q1 in the voltage level shift circuit 11 is connected to a voltage source Vcc (e.g., a voltage of 24 V). An emitter of the npn transistors Q2 in each of the voltage level shift circuits 11 to 16 is connected to one end of the associated resistor R1. The other end of the resistor R1 in each of the voltage level shift circuits 11 to 15 is connected to an emitter of the pnp transistor Q1 in each of the lower voltage level shift circuits 12 to 16, respectively. The other end of the resistor R1 in the voltage level shift circuit 16 is connected to a ground. The voltage level shift circuits 11 to 16 respectively shift the voltage level.
A base of an npn transistor Q3 is connected to the emitter of the pnp transistor Q1 in the voltage level shift circuit 15 and the collector of the npn transistor Q3 is connected to the voltage source Vcc. A base of an npn transistor Q4 is connected to an emitter of the npn transistor Q3 and a collector of the npn transistor Q4 is connected to the voltage source Vcc. An emitter of the npn transistor Q4 is connected to one end of a resistor R2.
The resistor R2, a resistor R3 and a resistor R4 are cascaded. The other end of the resistor R4 is connected to the ground. A connection point between the resistors R2 and R3 is connected to a non-inverting input terminal of a comparator 18 and a connection point between the resistors R3 and R4 is connected to an inverting input terminal of the comparator 18. An output terminal of the comparator 18 is connected to a base of an npn transistor Q7.
A base of the pnp transistor Q1 in the voltage level shift circuit 11 is connected to bases of both of the pnp transistors Q5 and Q6. An emitter of the pnp transistor Q5 is connected to the voltage source Vcc and a collector of the pnp transistor Q5 is connected to both a collector of the npn transistor Q7 and a base of an npn transistor Q8. An emitter of the pnp transistor Q6 is connected to the voltage source Vcc and a collector of the pnp transistor Q6 is connected to a collector of the npn transistor Q8 and an output terminal 20. Emitters of both of the npn transistors Q7 and Q8 are connected to the ground.
This circuit is connected to, for example, a battery charger for Lithium batteries. Both the voltage source Vcc and the ground in FIG. 1 are commonly connected to those of the battery charger for the Lithium batteries. As a voltage of the voltage source Vcc increases, the electric potential of an emitter of the transistor Q1 in the voltage level shift circuit 15 increases. Then, both of the transistors Q3 and Q4 turn on. When a current through the resistor R3 increases higher than a predetermined value, the output of the comparator 18 changes into a high level, so that the transistor Q7 turns on and therefore the transistor Q8 turns off. At the same time, when the transistor Q1 in the voltage level shift circuit 11 turns on, both of the transistors Q5 and Q6 turn on because they are current mirror transistors of the transistor Q1. As a result, a reset signal of the high level is supplied from the output terminal 20.
Conventionally, when the voltage source Vcc temporarily drops, the output level of the output terminal 20 becomes a low level because the transistors Q1, Q5 and Q6 temporarily turn off due to a base emitter capacitance. FIG. 2 shows a timing chart of a conventional reset signal generation circuit. When the voltage of the voltage source Vcc temporarily drops from, for example, 24 V to 14 V at a time T1 and recovers soon after the voltage is dropped, the voltage between the base and the emitter of the transistor Q6 temporarily drops, as shown with a solid line in FIG. 2, and an electric potential of the base of the transistor Q8 temporarily increases, as shown with an alternate short and long dash line in FIG. 2. Though the reset signal should keep the high level because the starting voltage of the battery charging for the Lithium batteries is about 13 V, the reset signal of the output terminal 20 temporarily drops to a low level, as shown with a broken line in FIG. 2. In other words, the erroneous reset signal is supplied to the battery charger. This results in an erroneous restart of the battery charging.